BlexTw11/qlock-two
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add firmware

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BlexTw11
2016-01-17 23:50:05 +01:00
parent ef08c16b06
commit 7195dc3310
20 changed files with 727 additions and 0 deletions
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130
Firmware/.cproject Normal file
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27
Firmware/.project Normal file
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<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>qlocktwo</name>
<comment></comment>
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23
Firmware/.settings/de.innot.avreclipse.core.prefs Normal file
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avrtarget/ClockFrequency=18432000
avrtarget/ExtRAMSize=0
avrtarget/ExtendedRAM=false
avrtarget/MCUType=atmega168
avrtarget/UseEEPROM=false
avrtarget/UseExtendedRAMforHeap=true
avrtarget/avrdude/BitBangDelay=
avrtarget/avrdude/Bitclock=
avrtarget/avrdude/EEPROMFile=
avrtarget/avrdude/EEPROMFromConfig=true
avrtarget/avrdude/FlashFile=
avrtarget/avrdude/FlashFromConfig=true
avrtarget/avrdude/NoChipErase=false
avrtarget/avrdude/NoSigCheck=false
avrtarget/avrdude/NoVerify=false
avrtarget/avrdude/NoWrite=false
avrtarget/avrdude/OtherOptions=
avrtarget/avrdude/ProgrammerID=programmerconfig.1
avrtarget/avrdude/UseCounter=false
avrtarget/avrdude/WriteEEPROM=false
avrtarget/avrdude/WriteFlash=true
avrtarget/perConfig=false
eclipse.preferences.version=1

6
Firmware/.settings/org.eclipse.cdt.core.prefs Normal file
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eclipse.preferences.version=1
environment/project/de.innot.avreclipse.configuration.app.debug.1815879625/AVRTARGETMCU/delimiter=;
environment/project/de.innot.avreclipse.configuration.app.debug.1815879625/AVRTARGETMCU/operation=replace
environment/project/de.innot.avreclipse.configuration.app.debug.1815879625/AVRTARGETMCU/value=atmega168
environment/project/de.innot.avreclipse.configuration.app.debug.1815879625/append=true
environment/project/de.innot.avreclipse.configuration.app.debug.1815879625/appendContributed=true

19
Firmware/include/buttons.h Normal file
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/*
* buttons.h
*
* Created on: 09.01.2016
* Author: BlexTw11
*/
#ifndef INCLUDE_BUTTONS_H_
#define INCLUDE_BUTTONS_H_
#define BTN_PORT PORTD
#define BTN_DDR DDRD
#define BTN_HOUR PD5
#define BTN_MINUTE PD6
#define BTN_MODE PD7
#endif /* INCLUDE_BUTTONS_H_ */

15
Firmware/include/dcf77.h Normal file
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/*
* dcf77.h
*
* Created on: 09.01.2016
* Author: BlexTw11
*/
#ifndef INCLUDE_DCF77_H_
#define INCLUDE_DCF77_H_
#define DCF77_PORT PORTB
#define DCF77_DDR DDRB
#define DCF77_PIN PB0
#endif /* INCLUDE_DCF77_H_ */

24
Firmware/include/ds1307.h Normal file
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/*
* ds1307.h
*
* Created on: 09.01.2016
* Author: BlexTw11
*/
#ifndef INCLUDE_DS1307_H_
#define INCLUDE_DS1307_H_
#define I2C_PORT PORTC
#define I2C_DDR DDRC
#define I2C_CLK PC5
#define I2C_DATA PC4
// Signal In from DS1307 (1 Hz)
#define DS1307_PORT PORTD
#define DS1307_DDR DDRD
#define DS1307_PIN PD4
#define DS1307_ADDR 0b1101000
#endif /* INCLUDE_DS1307_H_ */

19
Firmware/include/global.h Normal file
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#ifndef global_h
#define global_h
#define F_CPU 18432000UL
#define BAUD_RATE 9600
#define SET(port,pin) (port |= (1<<pin))
#define CLR(port,pin) (port &= ~(1<<pin))
#define TOGL(port,pin) (port ^= (1<<pin))
#define LED_PORT PORTD
#define LED_DDR DDRD
#define LED_PIN PD3
typedef enum { FALSE = 0, TRUE } bool;
#endif

13
Firmware/include/ldr.h Normal file
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/*
* ldr.h
*
* Created on: 09.01.2016
* Author: BlexTw11
*/
#ifndef INCLUDE_LDR_H_
#define INCLUDE_LDR_H_
#endif /* INCLUDE_LDR_H_ */

33
Firmware/include/shift_register.h Normal file
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#ifndef shift_register_h
#define shift_register_h
#include <avr/io.h>
/* Definiert die Register-Ansteuerung.
* Entweder per SPI oder per Software. */
#define SPI // SOFTWARE
#ifdef SOFTWARE
// Software
#define PORT_SHIREG PORTC
#define DDR_SHIREG DDRC // Richtungsregister
#define PI_SCL PC5
#define PI_SCK PC4
#define PI_RCK PC3
#define PI_SER PC2
//#define PI_G PC2
#else
// SPI
#define DDR_SPI DDRB
#define PORT_SPI PORTB
#define SPI_RCK PB2 // SS
#define SPI_SCK PB5 // SCK
#define SPI_SIN PB3 // MOSI
#endif
// Registerbreite (durch Kaskadierung erweiterbar)
#define REG_WIDTH 32
void shiftReg_Init(void);
void shiftReg_Transmit(uint32_t byte);
#endif

20
Firmware/include/uart.h Normal file
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/*
* uart.h
*
* Created on: 26.11.2015
* Author: BlexTw11
*/
#ifndef UART_H_
#define UART_H_
void UART_init(uint16_t baud_rate);
uint8_t UART_rx_char(void);
void UART_tx_char(uint8_t data);
void UART_tx_str(char * data);
#endif /* UART_H_ */

13
Firmware/include/woerter.h Normal file
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/*
* woerter.h
*
* Created on: 09.01.2016
* Author: BlexTw11
*/
#ifndef INCLUDE_WOERTER_H_
#define INCLUDE_WOERTER_H_
#endif /* INCLUDE_WOERTER_H_ */

8
Firmware/src/buttons.c Normal file
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/*
* buttons.c
*
* Created on: 09.01.2016
* Author: BlexTw11
*/

8
Firmware/src/dcf77.c Normal file
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/*
* dcf77.c
*
* Created on: 09.01.2016
* Author: BlexTw11
*/

61
Firmware/src/ds1307.c Normal file
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/*
* ds1307.c
*
* Created on: 09.01.2016
* Author: BlexTw11
*/
#include <util/twi.h>
void TWIInit(void)
{
//set SCL to 400kHz
TWSR = 0x00;
TWBR = 0x0C;
//enable TWI
TWCR = (1<<TWEN);
}
void TWI_start(void)
{
TWCR = (1<<TWINT)|(1<<TWSTA)|(1<<TWEN);
while ((TWCR & (1<<TWINT)) == 0);
}
//send stop signal
void TWI_stop(void)
{
TWCR = (1<<TWINT)|(1<<TWSTO)|(1<<TWEN);
}
void TWI_write(uint8_t u8data)
{
TWDR = u8data;
TWCR = (1<<TWINT)|(1<<TWEN);
while ((TWCR & (1<<TWINT)) == 0);
}
uint8_t TWI_read_ACK(void)
{
TWCR = (1<<TWINT)|(1<<TWEN)|(1<<TWEA);
while ((TWCR & (1<<TWINT)) == 0);
return TWDR;
}
uint8_t TWI_read_NACK(void)
{
TWCR = (1<<TWINT)|(1<<TWEN);
while ((TWCR & (1<<TWINT)) == 0);
return TWDR;
}
uint8_t TWI_get_status(void)
{
uint8_t status;
//mask status
status = TWSR & 0xF8;
return status;
}

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/*
* ldr.c
*
* Created on: 09.01.2016
* Author: BlexTw11
*/

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#include <avr/io.h>
#include <stdint.h>
#include <util/delay.h>
#include <avr/interrupt.h>
#include "global.h"
#include "shift_register.h"
#include "uart.h"
#define UART_MAXSTRLEN 20
volatile uint8_t uart_str_complete = 0; // 1 .. String komplett empfangen
volatile uint8_t uart_str_count = 0;
volatile char uart_buffer[UART_MAXSTRLEN + 1] = "";
volatile uint8_t flag_50ms;
volatile uint8_t flag_1sec;
ISR(TIMER0_COMPA_vect)
{
static uint8_t millisekunden = 0;
static uint8_t sekunden = 0;
if (millisekunden++ == 50)
{
//TOGL(PORTC, PC0);
millisekunden = 0;
sekunden++;
flag_50ms = 1;
}
if (sekunden == 20)
{
sekunden = 0;
flag_1sec = 1;
}
}
ISR(USART_RX_vect)
{
unsigned char nextChar;
// Daten aus dem Puffer lesen
nextChar = UDR0;
if( uart_str_complete == 0 )
{ // wenn uart_string gerade in Verwendung, neues Zeichen verwerfen
// Daten werden erst in uart_string geschrieben, wenn nicht String-Ende/max Zeichenlänge erreicht ist/string gerade verarbeitet wird
if( nextChar != '\n' &&
nextChar != '\r' &&
uart_str_count < UART_MAXSTRLEN )
{
uart_buffer[uart_str_count] = nextChar;
uart_str_count++;
}
else
{
uart_buffer[uart_str_count] = '\0';
uart_str_count = 0;
uart_str_complete = 1;
}
}
}
void init_timer0(void)
{
// Timer0 initialisieren.
TCCR0A = (1 << WGM01); // CTC Modus
TCCR0B = (1 << CS02); // Prescaler: 256
OCR0A = 72-1; // Zaehlwert auf 73 setzen
TIMSK0 |= (1 << OCIE0A); // Timer Interrupt Maske aktivieren
/*
// Timer initialisieren.
TCCR1B = (1 << CS12) | (1 << WGM12); // Prescaler auf 256
//TCNT0 = 0;
OCR1AL = 72-1;
OCR1AH = 0;
TIMSK1 |= (1 << OCIE1A);
*/
}
int8_t parse_input(void)
{
if (uart_str_complete)
{
uart_str_complete = 0;
if (uart_buffer[0] == 'L' && uart_buffer[1] == 'E' && uart_buffer[2] == 'D'
&& uart_buffer[3] >= 0x1 && uart_buffer[3] <= 0xf)
{
return uart_buffer[3];
}
return -1;
}
return 0;
}
int main(void)
{
uint8_t toggle = 0,
led = 1;
int8_t input = 0;
flag_50ms = 0;
flag_1sec = 0;
init_timer0();
//shiftReg_Init();
//UART_init(BAUD_RATE);
LED_DDR = (1 << LED_PIN);
LED_PORT &= ~(1 << LED_PIN);
sei();
while(1)
{
if (flag_1sec)
{
flag_1sec = 0;
//shiftReg_Transmit(led);
TOGL(LED_PORT, LED_PIN);
}
/*
input = parse_input();
if (input > 0)
{
shiftReg_Transmit(1 << input-1);
UART_tx_str("ACK\n");
}
else if (input < 0)
{
UART_tx_str("NACK\n");
input = 0;
}
*/
}
return 0;
}

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/*
* matrix.c
*
* Created on: 09.01.2016
* Author: BlexTw11
*/

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Firmware/src/shift_register.c Normal file
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/**************************************************************************************************************
*
* shift_register.c
*
* Author: BlexTw11
* Erstellt am: 04.09.2015
*
* Ansteuerung fuer Schieberegister (M74HC595).
* Register koennen auch kaskadiert werden. Dazu muss das Define REG_WIDTH
* in shift_register.h angepasst werden (vielfaches von 8).
*
***************************************************************************************************************/
#include <avr/io.h>
#include "global.h"
#include "shift_register.h"
/**
* @brief Initialisiert die Ports fuer das Schieberegister.
*/
void shiftReg_Init(void)
{
#ifdef SOFTWARE
// Setze Richtungsregister
DDR_SHIREG = (1<<PI_SCL)|(1<<PI_SCK)|(1<<PI_RCK)|(1<<PI_SER);
//SET(DDR_SHIREG, PI_G);
PORT_SHIREG &= ~( (1<<PI_SCL)|(1<<PI_SCK)|(1<<PI_RCK)|(1<<PI_SER) );
#elif defined SPI
/* Set MOSI and SCK output, all others input */
DDR_SPI = (1<<SPI_RCK)|(1<<SPI_SCK)|(1<<SPI_SIN);
/* Enable SPI, Master, set clock rate fck/16 */
SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
#endif
// Reset register
shiftReg_Transmit(0);
}
/**
* @brief Initialisiert die Ports fuer das Schieberegister.
* @param[in] transData Zu uebertragende Daten. Wird byteweise gesendet.
*/
void shiftReg_Transmit(uint32_t transData)
{
uint8_t i;
#ifdef SOFTWARE
uint32_t bit = (1 << (REG_WIDTH-1) ); // Bit auf MSB setzen, in Abhaengigkeit von Registerbreite.
// Setze SCLR auf High
SET(PORT_SHIREG, PI_SCL);
for (i = 0; i < REG_WIDTH; i++)
{
// Shifte das Bit bei jedem Durchlauf nach rechts und AND-Verknuepfe es mit dem
// Byte-Inhalt.
if ( transData & (bit >> i) )
{
SET(PORT_SHIREG, PI_SER);
}
else
{
CLR(PORT_SHIREG, PI_SER);
}
// Setze Impuls auf den Schiebe-Takt
CLR(PORT_SHIREG, PI_SCK);
SET(PORT_SHIREG, PI_SCK);
CLR(PORT_SHIREG, PI_SCK);
}
// Setze Impuls auf den Speichertakt.
CLR(PORT_SHIREG, PI_RCK);
SET(PORT_SHIREG, PI_RCK);
CLR(PORT_SHIREG, PI_RCK);
#elif defined SPI
//for (i = 0; i < (REG_WIDTH >> 3); i++)
{
/* Start transmission */
SPDR = (transData << 8);
/* Wait for transmission complete */
while(!(SPSR & (1 << SPIF)));
// Setze Impuls auf den Speichertakt.
CLR(PORT_SPI, SPI_RCK);
SET(PORT_SPI, SPI_RCK);
CLR(PORT_SPI, SPI_RCK);
}
#endif
}

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/*
* uart.c
*
* Created on: 26.11.2015
* Author: BlexTw11
*/
#include <avr/io.h>
#include "global.h"
#include "uart.h"
void UART_init(uint16_t baud_rate)
{
// Set baud rate (Calculation type is VERY importent!)
uint16_t baud_val = ( F_CPU/16/baud_rate - 1 );
UBRR0H = baud_val >> 8;
UBRR0L = baud_val & 0xff;
// enable receiver and transmitter
UCSR0B = (1 << RXEN0) | (1 << TXEN0) | (1<<RXCIE0);
// set frame format: 8 bit data, 1 stop bit
UCSR0C = (1 << UCSZ01) | (1 << UCSZ00);
}
uint8_t UART_rx_char(void)
{
/* Wait for data to be received */
while ( !(UCSR0A & (1<<RXC0)) );
/* Get and return received data from buffer */
return UDR0;
}
void UART_tx_char(uint8_t data)
{
/* Wait for empty transmit buffer */
while ( !( UCSR0A & (1<<UDRE0)) );
/* Put data into buffer, sends the data */
UDR0 = data;
}
void UART_tx_str(char * data)
{
while(*data)
UART_tx_char(*(data++));
}